1. Field of Invention
This invention relates to an output buffer circuit for an integrated circuit to reduce noise in the integrated circuit, and more particularly to an output buffer circuit for an integrated circuit which prevents an instantaneous increase in the current occurring in the output buffer circuit, thereby improving the operability of the integrated circuit.
2. Background Information
Generally, a RAM (Random Access Memory) comprises memory cells for storing information, sense amplifiers for sensing the information stored in the memory cells and output buffer circuits to output the amplified signals from the sense amplifier. When the state of the output is inverted in the output buffer circuit, a transitory high peak current flows, thereby causing noise in the entire integrated circuit. The noise results in a delay in the access time, thereby deteriorating the property of the integrated circuit.
Therefore, it is an object of the present invention to provide an output buffer circuit for an integrated circuit in which the instantaneous higher peak current produced when the output in the integrated circuit is inverted can be prevented by controlling an output voltage level from the output buffer circuit to a middle level just before the phase of the output is inverted.
Accordingly, the instantaneous higher peak current can be reduced by utilizing the output buffer circuit according to the invention.
An advantage to reducing the higher peak current according to the present invention is the alleviation of noise produced by the higher peak current when the state of output from the output buffer circuit is inverted, thereby improving the property of the integrated circuit.